11 records matched your query       

01175aam a2200301 i 4500
001 E6DF97786B5311E69AFE1DDBDAD10320
003 SILO
005 20160826010517
008 150703s2016    enka   f b    001 0 eng c
020    $a 0080971296
020    $a 9780080971292
035    $a (OCoLC)929691957
040    $a COO $b eng $e rda $c COO $d OCLCO $d YDXCP $d OCLCO $d OCLCF $d BTCTA $d CDX $d WAU $d IWA $d SILO
042    $a pcc
050  4 $a TK7895 G36 W54 2016
100 1  $a Wilson, Peter R. $q (Peter Reid), $e author.
245 10 $a Design recipes for FPGAs : $b using Verilog and VHDL / $c Peter Wilson.
250    $a Second edition.
264  1 $a London, UK : $b Newnes, an imprint of Elsevier, $c 2016.
300    $a xix, 369 pages : $b illustrations ; $c 24 cm
504    $a Includes bibliographical references (pages 361-363) and index.
650  0 $a Field programmable gate arrays $x Design and construction.
650  0 $a Verilog (Computer hardware description language)
650  0 $a VHDL (Computer hardware description language)
941    $a 1
952    $l USUX851 $d 20180605023524.0
956    $a http://locator.silo.lib.ia.us/search.cgi?index_0=id&term_0=E6DF97786B5311E69AFE1DDBDAD10320
994    $a C0 $b IWA