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Author:

Beerel, Peter A.

Title:

A designer's guide to asynchronous VLSI / Peter A. Beerel, Recep O. Ozdag, Marcos Ferretti.

Publisher:

Cambridge University Press,

Copyright Date:

2010

Description:

xii, 339 p. : ill. ; 26 cm.

Subject:

Integrated circuits--Computer-aided design.--Computer-aided design.
Integrated circuits--Design and construction.--Design and construction.

Other Authors:

Ozdag, Recep O.
Ferretti, Marcos

Notes:

Includes bibliographical references and index.

Contents:

Introduction -- Channel-based asynchronous design -- Modeling channel-based designs -- Pipeline performance -- Performance analysis and optimization -- Deadlock -- A taxonomy of design styles -- Synthesis-based controller design -- Micropipeline design -- Syntax-directed translation -- Quasi-delay-intensitive pipeline templates -- Timed pipeline templates -- Single-track pipeline templates -- Asynchronous crossbar -- Design example : the Fano algorith.

Summary:

"Bypass the limitations of synchronous design and create low power, higher performance circuits with shorter design times using this practical guide to asynchronous design. The fundamentals of asynchronous design are covered, as is a large variety of design styles, while the emphasis throughout is on practical techniques and real-world applications"--Provided by publisher.
"This book provides an introduction to this diverse area of VLSI from a designer's point of view. Our goal is to enable designers to appreciate the many asynchronous design choices that may be readily available in the near future"--Provided by publisher.

ISBN:

0521872448 (hardback)
9780521872447 (hardback)

OCLC:

(OCoLC)459209613

LCCN:

2009042290

Locations:

USUX851 -- Iowa State University - Parks Library (Ames)