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Author:
Waterman, Steve.
Title:
Digital logic simulation and CPLD programming with VHDL /
Steve Waterman.
Publisher:
Prentice Hall,
Copyright Date:
c2003
Description:
xi, 301 p. : ill. ; 28 cm.
Subject:
Logic circuits--Design and construction.--Laboratory manuals.
Logic circuits--Computer simulation--Laboratory manuals.
Logic programming.--Laboratory manuals.
VHDL (Computer hardware description language)
Notes:
Includes bibliographical references (p. 297).
Contents:
Section 1 : Asynchronous circuits -- logic gates ; Boolean laws, principles, and rules ; Combinational logic circuits ; Implementing logic designs ; Implementing logic designs with VHDL ; Adders ; Adding and subtracting ; Comparators ; Parity ; Encoders ; Decoders ; Multiplexers ; Demultiplexers ; Latches ; 555 timer -- Section 2 : Synchronous circuits -- Flip-flops ; Asynchronous counters ; Synchronous counters ; Shift registers -- Section 3 : Library of paramatize modules (LPM functions) -- LPMA̲nd ; LPMA̲dd ; LPMC̲ompare ; LPMD̲ecode ; LPMM̲UX ; LPMC̲OUNTER ; LMPS̲HIFTREG -- Section 4 : Appendices.
ISBN:
9780130967602
0130967602
OCLC:
(OCoLC)49743751
LCCN:
2002070007
Locations:
USUX851 --
Iowa State University - Parks Library
(Ames)
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