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01251aam a22003254a 4500 001 3F6C40D66A8B11E689525693DAD10320 003 SILO 005 20160825010506 008 090901s2010 njua b 001 0 eng 010 $a 2009034771 020 $a 0137045794 (hbk. : alk. paper) 020 $a 9780137045792 (hbk. : alk. paper) 035 $a (OCoLC)426809738 040 $a DLC $c DLC $d YDX $d BTCTA $d UKM $d BWX $d CDX $d CUS $d SILO 050 00 $a TK7885.7 Z86 2010 082 00 $a 621.390285/53 $2 22 100 1 $a Zwoli¿ski, Mark 245 10 $a Digital system design with SystemVerilog / $c Mark Zwolinski. 260 $a Upper Saddle River, NJ : $b Addison-Wesley, $c c2010. 300 $a xxix, 367 p. : $b ill. ; $c 24 cm. 490 1 $a The Prentice Hall modern semiconductor design series 504 $a Includes bibliographical references (p. 347-348) and index. 650 0 $a Verilog (Computer hardware description language) 650 0 $a Electronic digital computers $x Design and construction 650 0 $a Computer simulation 830 0 $a Prentice Hall modern semiconductor design series 941 $a 1 952 $l USUX851 $d 20230706014837.0 956 $a http://locator.silo.lib.ia.us/search.cgi?index_0=id&term_0=3F6C40D66A8B11E689525693DAD10320 994 $a C0 $b IWAInitiate Another SILO Locator Search